English  |  正體中文  |  简体中文  |  全文筆數/總筆數 : 51258/86283 (59%)
造訪人次 : 8030123      線上人數 : 68
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library & TKU Library IR team.
搜尋範圍 查詢小技巧:
  • 您可在西文檢索詞彙前後加上"雙引號",以獲取較精準的檢索結果
  • 若欲以作者姓名搜尋,建議至進階搜尋限定作者欄位,可獲得較完整資料
  • 進階搜尋
    請使用永久網址來引用或連結此文件: http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/38563

    題名: New architecture for high throughput-rate real-time 2-D DCT and the VLSI design
    作者: Chiang, Jen-shiun;Huang, Hsiang-chou
    貢獻者: 淡江大學電機工程學系
    日期: 1996-09-23
    上傳時間: 2010-04-15 10:57:06 (UTC+8)
    出版者: N.Y.: Institute of Electrical and Electronic Engineers (IEEE)
    摘要: The discrete cosine transform (DCT) has been widely used as the core of digital image and video signal compression. However, its computation is so intensive and is of great necessity to meet the requirement of high speed. In this paper, a new architecture for the VLSI design of 2-D DCT has been developed. This architecture contains the following features: (1) using the programmable logic array (PLA) to replace multipliers, (2) overlapped row-column operations and pipeline structure to reduce the total computation time, and (3) highly modular and regular structure for the efficient VLSI implementation. The architecture is implemented to a 8×8 2-D DCT. The circuit is designed by UMC's 0.8 μm spdm CMOS process and the cell library is provided by ITRI CCL. The simulation is shown that the speed of the data processing for this DCT is more than 50 MHz. It performs equivalently 800 million multiplication and accumulations per second
    關聯: ASIC Conference and Exhibit, 1996. Proceedings., Ninth Annual IEEE International, pp.219-222
    DOI: 10.1109/ASIC.1996.551997
    顯示於類別:[電機工程學系暨研究所] 會議論文


    檔案 描述 大小格式瀏覽次數
    0780333020_p219-222.pdf419KbAdobe PDF418檢視/開啟
    New Architecture for IIigh hroughput-Rate Real-Time 2-D DCT and the VLSI design.pdf418KbAdobe PDF256檢視/開啟



    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library & TKU Library IR teams. Copyright ©   - 回饋