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    Please use this identifier to cite or link to this item: http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/38558


    Title: The design and implementation of a 3.3V 400mHz all digital phase-loked loop
    Authors: Chen, Kuang-yuan;江正雄;Chiang, Jen-shiun
    Contributors: 淡江大學電機工程學系
    Date: 1997
    Issue Date: 2010-01-11 15:29:40 (UTC+8)
    Relation: The 8th VLSI deign/CAD symposium
    Appears in Collections:[Graduate Institute & Department of Electrical Engineering] Proceeding

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