English  |  正體中文  |  简体中文  |  全文筆數/總筆數 : 64178/96951 (66%)
造訪人次 : 9526768      線上人數 : 8748
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library & TKU Library IR team.
搜尋範圍 查詢小技巧:
  • 您可在西文檢索詞彙前後加上"雙引號",以獲取較精準的檢索結果
  • 若欲以作者姓名搜尋,建議至進階搜尋限定作者欄位,可獲得較完整資料
  • 進階搜尋
    請使用永久網址來引用或連結此文件: https://tkuir.lib.tku.edu.tw/dspace/handle/987654321/38552


    題名: An efficient VLSI architecture for RSA public-key cryptosystem
    其他題名: 具高效能RSA公開金匙編碼系統之超大型積體電路架構
    作者: 江正雄;Chiang, Jen-shiun;Chen, Jian-kao
    貢獻者: 淡江大學電機工程學系
    日期: 1999-07
    上傳時間: 2010-04-15 10:47:23 (UTC+8)
    出版者: Institute of Electrical and Electronics Engineers (IEEE)
    摘要: In this paper, a new efficient VLSI architecture to compute RSA public-key cryptosystem is proposed. The modified H-algorithm is applied to find the modular exponentiation. By this modified H-algorithm, the modular multiplication steps were reduced by about 5n/18. For the modular multiplication the L-algorithm (LSB first) is used. In the architecture of the modular multiplication the iteration times are only half of Montgomery's algorithm and the H-algorithm. By this arrangement, this architecture of RSA has a very good area-time product.
    關聯: Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on (Volume:1 ), pp.496-499
    DOI: 10.1109/ISCAS.1999.777936
    顯示於類別:[電機工程學系暨研究所] 會議論文

    文件中的檔案:

    檔案 描述 大小格式瀏覽次數
    0780354710_1p496-499.pdf362KbAdobe PDF541檢視/開啟
    index.html0KbHTML268檢視/開啟

    在機構典藏中所有的資料項目都受到原著作權保護.

    TAIR相關文章

    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library & TKU Library IR teams. Copyright ©   - 回饋