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    題名: 智慧型串列式快閃記憶晶片之平台設計
    其他題名: Platform design on intelligent serial type of flash memory chip
    作者: 廖光耀;Liao, Kuang-yao
    貢獻者: 淡江大學電機工程學系碩士班
    簡丞志;Chien, Cheng-chih
    關鍵詞: 串列式;快閃記憶晶體;系統晶片;FPGA;UART;FPGA;Flash Memory;SOC
    日期: 2005
    上傳時間: 2010-01-11 07:14:56 (UTC+8)
    摘要: 本論文的研究動機在設計一套驗證智慧型串列式快閃記憶晶片之開發平台。並利用此系統平台來測試智慧型串列式快閃記憶晶片的記憶體架構存取方法及硬體介面功能。

    隨著科技與製造技術的進步,各種諸如個人數位助理機(PDA)、數位相機、行動電話、筆記型電腦之類的電子設備的功能愈來愈強大,導致使用者對於大量資料儲存空間的需求愈來愈多,使得各式各樣記憶卡紛紛被推出,如CF Card、SD Card等等。但欲存取這些記憶卡內的資料時,這些電子設備產品需設有其專屬介面。但目前許多電子設備的產品並未整合這些介面,便造成使用的不便。

    有建於此等等問題的解決,此串列式快閃記憶晶片規格設計使用一般通用的UART埠為主要的資料傳輸介面及指令控制介面方式,以提供一種適用性廣之傳輸介面,並可外加利用並列資料匯流排介面來達
    到傳輸高速資料能力,以及內建資料儲存和檔案管理功能來降低資料存取時系統所須要的處理能力資源。因此利用本儲存媒體及介面,便可使電子設備產品無須額外增設特殊規格的存取介面時也能管理使用大型容量記憶體(卡)的能力。

    本論文的智慧型串列式快閃記憶晶片之開發平台主要是用來驗證“智慧型串列式快閃記憶晶片”之規格及功能。整體的發展平台實現利用系統晶片SOC(System on Chip)的平台設計架構上,使用Altera FPGA、8051單晶片IP Core及快閃記憶體三種主要單元來建構完成,並利用此發展平台來驗證以得到結果,確認本文所設計記憶晶片開發平台上驗證測試智慧型串列式快閃記憶晶片功能確實可行。
    This paper is to design a new developing flat-form for verifying an intelligent series flash memory IC. Also, we use this plat-form to test the function of access method of new memory control structure of the intelligent series flash memory IC and hardware interface.

    With the progress of technical and manufacturing technology, the functions of electronic equipments are getting more and more powerful, such as PDA , DSC, mobile phone and notebook computer . And it causes the user’s demand for the larger data storage become more and more. Therefore, it makes many kinds of memory card being come out, such as CF Card, SD Card and so on. But these electronic products need their exclusively interface when we want to access the data. At present, many electronic products do not integrate these interfaces, and it makes the user is inconvenient when using them.

    To solve this kind of question, the design of series flash memory IC using a common currency UART port to be the main interface for the data transmission and the command control, and provide a widely suitable interface. And we could the use additional parallel bus interface to achieve the ability of high speed data transmission, and reduce system’s resources when data access by using the functions of data storage and file management which is built inside it. Therefore, by using this storage medium and interface, we could manage and use the high density memory (card) without additional access interface of special specification.

    The description of this paper is to verify the specification and function of “the intelligent series flash memory IC” by using the developing plat-form of intelligent series flash memory IC. To carry out the design of whole developing plat-form, we need to use Altera FPGA, 8051 Microcontroller IP Core and Flash Memory, and also based on the framework of SOC plat-form. Actually, we got the result by verified with this developing flat-form, and confirmed it is workable to test the function of intelligent series flash memory IC by using this memory IC plat-form.
    顯示於類別:[電機工程學系暨研究所] 學位論文

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