淡江大學機構典藏:Item 987654321/35856
English  |  正體中文  |  简体中文  |  全文笔数/总笔数 : 64191/96979 (66%)
造访人次 : 8418697      在线人数 : 7281
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library & TKU Library IR team.
搜寻范围 查询小技巧：
  • 您可在西文检索词汇前后加上"双引号"，以获取较精准的检索结果
  • 若欲以作者姓名搜寻，建议至进阶搜寻限定作者字段，可获得较完整数据
    •  进阶搜寻


    jsp.display-item.identifier=請使用永久網址來引用或連結此文件: https://tkuir.lib.tku.edu.tw/dspace/handle/987654321/35856


    题名: 振盪器之溫度補償設計與分析
    其它题名: Oscillator design and analysis for temperature compensation
    作者: 林正峰;Lin, Chang-feng
    贡献者: 淡江大學電機工程學系碩士在職專班
    楊維斌;Yang, Web-bin
    关键词: 振盪器;溫度補償;Oscillator;temperature compensation
    日期: 2009
    上传时间: 2010-01-11 07:14:25 (UTC+8)
    摘要: 有別於以往的複雜電路，本論文提供簡單的電路實現一穩定且具溫度補償的振盪器，其架構由一溫度及電壓補償之電流源和一環型電流控制震盪器組合而成。
    在電流源部份，其利用傳統的電流源具有正電壓及正溫度的特性，加上一進階電流源，其具有負溫度系數的特性，再透過電路設計為一負電源之電流源，組合成一具有溫度及電壓補償之電流源，以台灣積體電路公司0.35μm製程實現一定電流源，模擬結果溫度於-40度到85度，其電流變化為±99.2 ppm/℃，電壓於2.5伏特到3.8伏特，其電流變化為±2 %。
    環型電流控制震盪器部分，其架構是由五級的反向器組合而成，其中延遲的時間由MOS中的寄生電容以及定電流源的電流產生，本篇論文將輸出頻率設計在4MHz，此頻率可應用在一般IC內部震盪頻率，再將其除頻後可作為時間計數用，之所以沒有設計更高頻的原因是考慮到電源消耗的問題。
    This paper presents a simple oscillator with temperature compensation which is different from the other complex circuit. The oscillator is composed of ring oscillator and current reference which works with power supply and temperature compensation.
    In current reference circuit, the traditional current reference circuit is utilized to exhibit positive supply voltage and positive temperature coefficient. And the advance current reference circuit is utilized to exhibit negative supply voltage and temperature coefficient. By combining these two components with adding operation, the output current will eliminate the variation of supply voltage and temperature. The current reference simulate with 0.35μm standard CMOS process. Simulated results shows that the variation is roughly ±2% with a supply voltage range from 2.5 V to 3.8 V and the temperature variation is roughly ±99.2ppm/ ℃ over a temperature range from -40 ℃ to 85℃.
    In ring oscillator, a five-stage inverter is utilized. The time delay produced by the circuit which is given by the total parasitical capacitance seen at the output of each stage. The output frequency of this study is 4MHz, which can be used in IC with frequency divider. Due to a limited power consumption, the output frequency can not be increased.
    显示于类别:[電機工程學系暨研究所] 學位論文

    文件中的档案:

    档案 大小格式浏览次数
    0KbUnknown409检视/开启

    在機構典藏中所有的数据项都受到原著作权保护.

    TAIR相关文章

    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library & TKU Library IR teams. Copyright ©   - 回馈