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    Title: 高效能主動式功率因數校正系統之設計與實現
    Other Titles: Design and implementation of high efficiency active power factor correction system
    Authors: 謝昌祐;Hsieh, Chang-yu
    Contributors: 淡江大學電機工程學系碩士班
    江正雄;Chiang, Jen-shiun
    Keywords: 功率因數校正;功因校正;主動式;昇壓轉換器;乘法器;除法器;脈衝寬度調變;帶差參考電路;轉導;Power factor correction;PFC;active;boost converter;multiplier;Divider;PWM;bandgap;transconductor
    Date: 2007
    Issue Date: 2010-01-11 07:14:17 (UTC+8)
    Abstract: 近幾年來隨著電子產業的蓬勃發展,各式各樣的電子產品亦充滿在我們的生活之中,然而為了維持各式的電子產品運作,最基本的電力部份更是不可或缺的設備之一,這些基本電力設備當中多數之需求又以交流對直流轉換器為主,因此對於電力設備的轉換效率便顯得相當重要。而評估轉換效率的優劣則是以功率因數值為主要的依據,目前的產業界以及學術界當中對於如何有效提升功率因數值,也有相當多的研究與相關產品,因此如何有效提升用電設備的電源使用效率便具有相當重要的研究發展價值。

    功率因數值的計算是根據實際消耗功率與視在消耗功率的比值為基準,因此功率因數不佳的電力設備即代表存在著不必要的虛功以及諧波成份。而電力設備所產生的虛功與諧波不僅無謂的加重公用電源設備的負擔,增加無謂的功率消耗,更因為諧波成份的加入而使得電源品質惡化,增加精密設備損壞與誤動作的風險。

    為了提高用電設備的效率以及減少所造成的諧波污染,在本文中提出了一個高效能的主動功率因數校正電路,本架構是以電壓電流以及負載的關係,將輸入電壓以及輸出負載經由運算後得到理想的輸入電流,使得輸入電流幾乎與輸入電壓同相位且無失真,藉此消除輸入電壓與輸入電流之相位差與電流失真,以減少電力的虛功消耗以及諧波成份。

    最後,我們更進一步的使用TSMC 0.5μm 5V/40V CMOS製程實現文中的主動式功率因數校正電路,以驗証本架構之可行性。並且經由模擬結果顯示本架構在固定及變動式負載下,皆可達到99%以上的功率因數值。
    In last years, the flourishing development of electronic industry fills with a lot of electronic products in our life. However, basic power components are indispensable equipment for maintain various electronic products. Since most demands rely mainly on AC to DC converter in these basic power equipments. The conversion efficiency is quite important to power equipments. The quality of assessing conversion efficiency is to regard power factor as main basis. In present industrial circle and academia has many research and relevant products to improvement power factor effectively. Therefore, it has quite important research value how about to improve power efficiency of power equipments.
    The calculation of power factor is according to ratios of real power and total power. Lower power factor electric equipment representative have unnecessary busywork and harmonic components. Electronic equipment produces busywork and harmonic components that not only increase unnecessary loading and power consumption in public power equipment. But also harmonic components insert into public power system that causes deteriorating of power quality. Risks increase into break and mistake of precision instrument.

    In order to improve efficiency of the electric equipment and reduce the harmonic pollution caused. In this thesis proposes a high efficient active power factor corrector circuit. This architecture is with relation among voltage, current, and loading. The ideal input current is calculated from input voltage and output loading. This ideal input current will make sure nearly with between phase and undistorted wave of input voltage. It can dispel current distortion and phase difference between input voltage and input current, and it can reduce busywork consumption and harmonic components.

    Finally, the proposed active power factor correction circuit is implemented by TSMC 0.5μm 5V/40V CMOS technology to verify feasibility of the architecture. Simulation results show that power factor can be more than 99% in the proposed architecture for constant and variable loading.
    Appears in Collections:[電機工程學系暨研究所] 學位論文

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