本論文提出一電源轉接器輸出電壓可調變之設計，可自動偵測系統負載狀況，在系統輕載時，調低電源轉接器的輸出電壓，來降低直流降壓電路中MOSFET損耗，達到節能之效；而在重載時，則調回原電源轉接器輸出電壓，而不需增加電源轉接器成本。 本設計的核心為一模糊系統晶片包括知識庫、模糊化模組、模糊推論引擎以及解模糊化介面等電路模組，而以Complex Programmable Logic Device (CPLD)實現之。透過輸出電流取樣，經由模糊控制晶片執行模糊運算，產生所需的脈波寬度調變(Pulse Width Modulation, PWM)訊號，來控制欲調變之電源轉接器輸出電壓。本論文應用此設計於筆記型電腦，實驗證實可達到節能、降低系統溫度、降低噪音等功能。此概念可延伸應用於許多家電產品。 This thesis presents an output voltage tunable design for the adaptors. The design consists of a scheme which can automatically detect the load conditions. Accordingly, the output voltage of the adaptors is tuned to be smaller in the light load, which in turn reduces the associated MOSFET loss so as to achieve the purpose of saving energy. Whereas in heavily load, the output voltage of the adaptors is tuned back to the normal value. The core of the design is a fuzzy system chip implemented by Complex Programmable Logic Device (CPLD), which is comprised of Fuzzifier Module, Fuzzy Knowledge base (FKB), Fuzzy Inference Engine and Defuzzifier Module. Having obtained the current sampled data, a PWM signal is produced through the operation of the fuzzy system chip. The pwm signal is fed into the adaptors to adjust the adaptor output voltage in order to align with the desired reference voltage. In this thesis the design has been applied to a notebook. Experimental results demonstrate that the tunable adaptors design can achieve energy saving, temperature reduction and acoustic noise reduction. This idea of the design can be applied to several electrical products.
