淡江大學機構典藏:Item 987654321/35384
English  |  正體中文  |  简体中文  |  Items with full text/Total items : 58654/92364 (64%)
Visitors : 577126      Online Users : 62
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library & TKU Library IR team.
Scope Tips:
  • please add "double quotation mark" for query phrases to get precise results
  • please goto advance search for comprehansive author search
  • Adv. Search
    HomeLoginUploadHelpAboutAdminister Goto mobile version
    Please use this identifier to cite or link to this item: http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/35384


    Title: 具奈米牛頓解析度之互補式金氧半力感測器之研究
    Other Titles: Research of the CMOS force sensor with nano Newton resolution
    Authors: 廖威豪;Liao, Wei-hao
    Contributors: 淡江大學機械與機電工程學系碩士班
    楊龍杰;Yang, Lung-jieh
    Keywords: 互補式金氧半導體;微機電系統;壓阻式;力感測器;CMOS MEMS;piezoresistive;force sensor
    Date: 2007
    Issue Date: 2010-01-11 06:27:55 (UTC+8)
    Abstract: 本研究利用國家晶片系統設計中心所提供之台積電TSMC 0.35um 2P4M標準積體電路代工,製作感測薄膜為100um×100um大小之壓阻式力感測器;以二氧化矽做為感測薄膜,多晶矽做為壓電阻,並配合有限元素分析軟體ANSYS改善構形並預估其輸出靈敏度。
    以正面濕式蝕刻方式減少晶粒面積浪費,利用硫酸雙氧水將金屬層蝕刻移去,其後利用氫氧化鉀(KOH)移除殘留金屬,續以氫氧化四甲銨(TMAH)對矽基底材蝕刻出V型槽(V-groove),得到感測薄膜之微結構。最後以反應離子蝕刻(RIE)移除金屬接腳之保護層並可藉此減薄感測薄膜厚度。蝕刻完成後,以市售雙排引腳形式之封裝電路板做晶粒之封裝。
    本研究成功製作出CMOS微型壓阻式力感測器,並有效改善後製程蝕刻時間製作薄膜微結構,具面積小、靈敏度高之特性。模擬預估之靈敏度約為 -6.12 ×10-3 ~ -2.36 uV/V/nN。
    This research proposes a novel concept to fabricate a piezoresistive micro force sensor with a sensing membrane size of 100um×100um by using standard integrated circuit foundry, TSMC 0.35um 2P4M process herein, is provided by CIC (Chip Implementation Center), Taiwan. In this research, we use silicon dioxide as a material of a membrane of the sensor, and polysilicon as a material of piezoresistor. We design the shape of sensors and estimate the output sensitivity of sensor according to the result simulated by finite element method analyze software, ANSYS.
    In order to reduce the waste of wafer area, front-side wet etching technique is adopted. We use piranha to remove the metal layers, and then use KOH to remove the residual metal and use TMAH to etch V-grooves of the silicon substrate. We can release the sensing membrane structure successfully by using this process. At last, we use RIE to remove the passivation on pad, by this way the thickness of the sensing membrane can be reduced. After wet etching and dry etching process, we package the dies by dual in-line package print circuit board which is sold in mart.
    In this work, the piezoresistive micro force sensor made by CMOS MEMS technique has been fabricated successfully, and it effectively shorten the total time of post process. The micro force sensor has the advantages of smaller size and high sensitivity. In the simulation, we provide 10uN force and get the sensitivity about -6.12 ×10-3 ~ -2.36 uV/V/nN.
    Appears in Collections:[Graduate Institute & Department of Mechanical and Electro-Mechanical Engineering] Thesis

    Files in This Item:

    File SizeFormat
    0KbUnknown409View/Open

    All items in 機構典藏 are protected by copyright, with all rights reserved.


    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library & TKU Library IR teams. Copyright ©   - Feedback