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    題名: A High-Efficiency and Wide-Load Current Range LDO with Dynamic Loop Gain Control Technique
    作者: Yang, Wei-bin
    日期: 2024-02
    上傳時間: 2024-03-08 12:06:56 (UTC+8)
    摘要: The design proposes a low-dropout regulator incorporating dynamic loop gain control to accommodate a wide load current range. It introduces a multi-phase error detection mechanism, a tri-state damping selector, and a dynamic integration shift register. These elements predict load variations and dynamically increase loop gain when the load variation is significant, all without increasing the input clock. This approach achieves a fast response and low power consumption simultaneously. The chip was implemented in 0.18 μm CMOS, with an input operating voltage of 1.2 V and an output voltage of 1 V. The measured results revealed that it could provide output currents from 0.5 to 150 mA, indicating that it had a 300 times wider current range. The maximum current efficiency was 99.93%, and the core area was 0.198 mm2.
    關聯: Japanese Journal of Applied Physics 63(2), 02SP79-1- 02SP79-9
    DOI: 10.35848/1347-4065/ad1e02
    顯示於類別:[電機工程學系暨研究所] 期刊論文

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