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    題名: An 80x Analog-Implemented Time-Difference Amplifier for Delay-Line-Based Coarse-Fine Time-to-Digital Converters in 0.18-μm CMOS
    作者: Horng-Yuan Shih;Sheng-Kai Lin;Po-Shun Liao
    關鍵詞: Coarse-fine time-to-digital converter (TDC);TDC;time-difference amplifier (TA)
    日期: 2015-08-13
    上傳時間: 2018-09-20 12:10:15 (UTC+8)
    出版者: IEEE
    摘要: An analog-implemented time-difference amplifier applied for coarse-fine time-to-digital converters is presented in this paper. Implemented in 0.18-μm CMOS process, a time difference within 225 ps can be amplified 80× linearly under maximum frequency of 25 MHz. Measured maximum gain error is 4.1%. Measured output rms jitter is 84.5 ps under gain of 80×. The time amplifier consumes 1.7 mW under supply voltage of 1.8 V.
    關聯: IEEE Transactions on Very Large Scale Integration Systems 23(8), pp. 1528-1533
    DOI: 10.1109/TVLSI.2014.2343244
    顯示於類別:[電機工程學系暨研究所] 期刊論文

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