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    題名: Wide‑range CMOS reference clock generator with a dynamic duty cycle scaling mechanism at a 0.9‑V supply voltage
    作者: Yang, Wei-Bin;Lo, Yu-Lung;Chang, Kuo-Ning;Lin, Yu-Yao
    日期: 2017年10月
    上傳時間: 2017-12-13 02:10:38 (UTC+8)
    摘要: This paper presents a wide-range CMOS reference clock generator with a dynamic duty cycle scaling mechanism. A new duty-cycle-to-voltage converter (DCVC) is proposed for the clock generator, which requires only the duty cycles of differential 25-MHz input signals. When these duty cycles are set into the DCVC, dual control voltages, namely VP and VN with positive and negative control duty cycle coefficients, respectively, are produced to manage the current sources of the differential voltage-controlled ring oscillator and supply a wide range of frequency channels. The proposed clock generator can supply a stable output clock with a wide range of frequencies from 37 kHz to 34 MHz. Notably, the wide-range CMOS reference clock generator can also be used in a universal serial bus hub or in wide band applications with low supply voltages and small areas.
    關聯: Microsystem Technologies
    顯示於類別:[電機工程學系暨研究所] 期刊論文

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