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    Please use this identifier to cite or link to this item: http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/111439


    Title: 影像特徵描述子匹配加速器實現
    Other Titles: Accelerator implementation for image feature descriptor matching
    Authors: 陳秉弘;Chen, Ping-Hung
    Contributors: 淡江大學電機工程學系碩士班
    李世安;Li, Shih-An
    Keywords: 特徵描述子匹配;降維;全域搜尋;FPGA加速器;Feature descriptor matching;dimensionality reduction;exhaustive search;FPGA Accelerator
    Date: 2016
    Issue Date: 2017-08-24 23:52:54 (UTC+8)
    Abstract: 本論文提出以多重解析全域搜尋之影像特徵描述子匹配演算法為基礎,以硬體描述語言實現影像特徵描述子匹配加速器,並應用於影像處理中的物件辨識及追蹤。在影像辨識與追蹤的研究中,常需要找出影像中物體模型的特徵點並做兩張影像的特徵點匹配運算。當特徵點的維度過高時,要比對兩邊的特徵資料需要花費較多的運算時間,而無法達到物件追蹤上的即時性。而多重解析全域搜尋之影像特徵描述子匹配演算法在這匹配議題上有著不錯的改善效果,此匹配演算法透過降維的方式將特徵描述子向量建立成一張多重解析表。其記錄著特徵描述子降維後的多層特徵點描述子向量。本文利用多重解析表計算兩特徵描述子向量的距離,以加速篩選候選點的速度。此演算法在運算上簡單且有許多重複的運算,所以其適合用硬體電路做平行化計算。故本文提出以硬體描述語言實現多重解析全域搜尋之影像特徵描述子匹配演算法硬體加速器。
    This thesis proposes an image feature descriptor matching accelerator for multi-resolution exhaustive search algorithm by hardware description language. The accelerator can apply to image recognition and tracking. In the image recognition and tracking research, the computer usually finds keypoints of the object model in image and computes keypoints matching for object feature descriptor. When the feature descriptor dimension is too high, the image processing must take a lot of computing time. Therefore it can’t achieve real-time image recognition and tracking. The multi-resolution exhaustive search algorithm has a good improving effect on the matching subject. The matching algorithm establishes a table of multi-resolution by reducing keypoint dimension. The multi-resolution table records the vector of multi-layer feature descriptor after feature descriptor dimensionality reduction. In this paper, we use the multiple resolution table to compute the distance between two feature descriptor vectors, and filter quickly the candidate points speed. This matching algorithm is simple in operation and has many repeat operations, so it is suitable for parallel computing with hardware circuitry. Therefore, this paper proposes to hardware description language to achieve multiple video analytic features global search algorithm to match the descriptors hardware accelerators.
    Appears in Collections:[電機工程學系暨研究所] 學位論文

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